The x86 instruction set architecture includes a LODS instruction that loads a byte, word, or dword from a memory location specified by DS:ESI into EAX. The x86 instruction set architecture also includes a REP prefix that allows the program to specify a count in ECX that specifies the number of iterations of the LODS instruction to perform. The ESI register is incremented and the ECX register is decremented on each iteration. (Additionally, there is a mode that decrements, rather than increments, ESI.)
One way to implement REP LODS is in microcode. For example, assuming the REP LODS specifies byte size data (i.e., REP LODSB), the microcode could include a loop whose body loads from the effective address in DS:ESI, increments ESI, and decrements ECX, such that it executes the number of times specified in ECX, such as is shown in the pseudo-code example here in Table 1.
TABLE 1loop:    load AL, DS:ESI    inc ESI    dec ECX    bnz loop     ; branch to loop if ECX is non-zero
Thus, for example, if the initial value of ECX is 8000, then the processor will execute 8000 load instructions.